System-on-a-Chip Verification - Methodology and Techniques
Prakash Rashinkar, Peter Paterson, Leena SinghISBN: 0792372794;
System-On-a-Chip Verification: Methodology and Techniques is the first book to cover verification strategies and methodologies for SOC verification from system level verification to the design sign- off. The topics covered include Introduction to the SOCdesign and verification aspects, System level verification in brief, Block level verification, Analog/mixed signal simulation, Simulation, HW/SW Co-verification, Static netlist verification, Physical verification, and Design sign-off in brief. All the verification aspects are illustrated with a single reference design for Bluetooth application. System-On-a-Chip Verification: Methodology and Techniques takes a systematic approach that covers the following aspects of verification strategy in each chapter: i. Explanation of the objective involved in performing verification after a given design step; ii. Features of options available; iii. When to use a particular option; iv. How to select an option; and v. Limitations...
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